Feb 12, 2009
NICS, in conjunction with the DOE-supported NCCS, sponsored a workshop April 13-16, which covered important issues for obtaining increased performance on the new Cray XT5 systems installed by both programs. These powerful supercomputer systems have features which must be well understood by developers and users to enable large applications to scale to higher number of processors and achieve sustained higher performance.
For details about the Workshop:
2008 Cray Workshop Home Page.
Workshop Documents
Monday, April 13, 2009
- Architecture of the AMD Quad Core CPUs – Brian Waldecker
- Introduction to NICS – Bruce Loftis
- Break Through Science on a Petaflop XT5 – John Levesque
- CrayXT Systems – John Levesque
- Science at the Petascale – Doug Kothe
- Indroduction to the Cray X86 Compiler – Nathan Wichmann
- RE-Introduction to One-Sided Communication – Nathan Wichmann
- Using OpenMP – Rebeca Hartman-Baker
Tuesday, April 14, 2009
- PGI Compilers & Tools PGI Pemier Support at ORNL – Brent Lebeck
- Cray XT Optimization Basics – Jeff Larkin
- How to Make Best Use of Cray MPI on the XT5 – Kim McMahon
- High-Speed Network Communication on the CrayXT – Kitrick Sheets
- MPI Tips on Cray XT5: Jaguar & Kraken – Mark Fahey
- Task-Oriented Computing within MADNESS – Scott Thornton
- Cray Scientific Libraries – Keita Teranishi
